000 | 01017nam#a2200217ua#4500 | ||
---|---|---|---|
001 | GOACATREC108458 | ||
008 | 050915s2006 flua b 001 0 eng | ||
245 | 0 | 0 |
_aEDA for IC system design, verification, and testing _cedited by Louis Scheffer, Luciano Lavagno, Grant Martin. |
246 | 0 | 0 | _aElectronic design automation for integrated circuit system design, verification, and testing |
260 | 0 | 0 |
_bCRC Taylor & Francis, _aBoca Raton, _c2006 |
020 | 0 | 0 | _a0849379237 |
300 | 0 | 0 |
_a1 v. (various pagings) : _bill. ; _c26 cm. |
700 | 0 | 0 | _aScheffer, Louis Kossuth. |
700 | 0 | 0 |
_aLavagno, Luciano, _d1959- |
700 | 0 | 0 |
_aMartin, Grant _q(Grant Edmund) |
650 | 0 | 0 |
_aIntegrated circuits _xComputer-aided design. |
650 | 0 | 0 |
_aIntegrated circuits _xData processing. _x Verification |
504 | 0 | 0 | _aIncludes bibliographical references and index. |
500 | 0 | 0 | _aCompanion volume of: EDA for IC implementation, circuit design, and process technology. |
440 | 0 | 0 | _aElectronic design automation for integrated circuits handbook |
999 |
_c107833 _d107833 |